Embodiments of the inventive concept relate generally to semiconductor memory devices. More particularly, embodiments of the inventive concept relate to semiconductor memory devices using an internal high power supply voltage in a specific operation mode, such as a self-refresh operation mode.
Dynamic random access memory (DRAM) is used in a wide variety of technical applications, ranging from satellite technologies to consumer electronics. Moreover, during the past several decades, there has been a continual demand for increasingly high capacity, high performance, and low power DRAM devices.
As DRAM devices have improved in their storage capacity, performance, and power consumption, their operating voltages have tended to decrease accordingly. In other words, the operating voltages for newer DRAM devices tend to be lower compared with older DRAM devices. As examples, low power (LP) double data rate 2 (DDR2) and double data rate 4 (DDR4) DRAM devices use an operation power supply voltage VDD of about 1.2V and a high power supply voltage VPP of about 1.8V or 2.5V.
In certain conventional DRAM devices, a high power supply voltage VPP is generated by self-boosting of an operation power supply voltage VDD within the DRAM devices. However, a voltage regulator can become overloaded if a high power supply voltage VPP of about 1.8V or 2.5V is generated from an operation power supply voltage VDD of about 1.2V through self-boosting. As a result, in LP DDR2 and DDR4 DRAM devices, the high power supply voltage of about 1.8V or 2.5V is received from an external source.
In a data processing system providing an external high power supply voltage EVPP to a DRAM, the external high power supply voltage EVPP is typically used to power other components in addition to the DRAM. Accordingly, to enter into a low power sleep mode, the data processing system typically cuts off the high power supply voltage EVPP to reduce power consumption by all of the components. But even in the sleep mode, the DRAM requires power to perform a refresh operation to retain stored data. Consequently, the DRAM device must be able to receive power from an alternative source to compensate for the loss of EVPP during the sleep mode of the data processing system.